{"id":599,"date":"2020-04-26T14:48:54","date_gmt":"2020-04-26T06:48:54","guid":{"rendered":"https:\/\/ecmos2.liho.work\/?p=599"},"modified":"2024-09-10T13:45:34","modified_gmt":"2024-09-10T05:45:34","slug":"ec24c1024a","status":"publish","type":"post","link":"https:\/\/www.ecmos.com.tw\/cn\/eeprom\/ec24c1024a\/","title":{"rendered":"EC24C1024A\uff5c1024K Bits Two-Wire Serial EEPROM"},"content":{"rendered":"\n
\u898f\u683c\u66f8\u4e0b\u8f09<\/div><\/a>\n\n\n\n
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General Description<\/h3>\n\n\n\n

The EC24C1024A are EEPROM devices that use the industrial standard 2-wire interface for communications. The EC24C1024A contains a memory array of 1024K-bits (131,072×8), which is organized in 25-byte per page. The EEPROM can operate in a wide voltage range from 1.7V to 5.5V which fits most application. This product can provide a low-power 2-wire EEPROM solution.
The device is offered in Lead-free, RoHS, halogen free or Green. The available package types are 8-pin SOP, SSOP.
The EC24C1024A is compatible with the industrial standard 2-wire bus protocol. If in case the bus is not responded, a new sent Op-code command will reset the bus and the device will respond correctly. The simple bus consists of the Serial Clock wire (SCL) and the Serial Data wire (SDA).
Utilizing such bus protocol, a Master device, such as a microcontroller, can usually control one or more Slave devices, alike this EC24C1024A. The bit stream over the SDA line includes a series of bytes, which identifies a particular Slave device, an instruction, an address within that Slave device, and a series of data, if appropriate. The
EC24C1024A also has a Write Protect pin (WP) to allow blocking any write operations over specified memory area.
Under no circumstance, the device will be hung up. In order to refrain the state machine entering into a wrong
state during power-up sequence or a power toggle off-on condition, a power on reset circuit is embedded. During
power-up, the device does not respond to any instructions until the supply voltage (VCC) has reached an acceptable stable level above the reset threshold voltage. Once VCC passes the power on reset threshold, the device is reset and enters into the Standby mode. This would also avoid any inadvertent Write operations during power-up stage.
During power-down process, the device will enter into standby mode, once VCC drops below the power on reset
threshold voltage. In addition, the device will be in standby mode after receiving the Stop command, provided that no internal write operation is in progress. Nevertheless, it is illegal to send a command unless the VCC is within its
operating level.<\/p>\n\n\n\n

Features<\/h3>\n\n\n\n

\u25cf Two-Wire Serial Interface, I2C
TM Compatible
\u2013 Bi-directional data transfer protocol
\u25cf Wide-voltage Operation
\u2013 VCC = 1.7V to 5.5V
\u25cf Speed: 400 KHz (1.7V) and 1 MHz (2.5V~5.5V)
\u25cf Standby current(max): 1uA, 1.7V
\u25cf Read Operating current (max.): 1 mA, 1.7V
\u25cf Write Operating current(max.)\uff1a3mA, 1.7V
\u25cf Hardware Data Protection
\u2013 Write Protect Pin
\u25cf Sequential & Random Read Features
\u25cf Memory organization: 131,072 x 8 bits
\u25cf Page Size: 256 bytes
\u25cf Page write mode
\u2013 Up to 256 bytes per page write
\u25cf Self timed write cycle with auto clear: 5ms (max.)
\u25cf Filtered inputs for noise suppression
\u25cf High-reliability
\u2013 Endurance: 1 million cycles
\u2013 Data retention: 100 years
\u25cf Industrial temperature grades
\u25cf Packages: SOP\/TSSOP 8L
\u25cf Lead-free, RoHS, Halogen free, Green<\/p>\n\n\n\n

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