The EC1837 is a high frequency step-down switching regulator with integrated internal highside high voltage power MOSFET. It provides 2A output with current mode control for fast loop response and easy compensation. The wide 12V to 80V input range accommodates a variety of step-down applications, including those in automotive input environment. A 1μA shutdown mode supply current allows use in battery-powered applications. High power conversion efficiency over a wide load range is achieved by scaling down the switching frequency at light
load condition to reduce the switching and gate driving losses. The frequency foldback helps prevent inductor current runaway during startup and thermal shutdown provides reliable, fault tolerant operation.
The EC1837 is available in ESOP8 package.
◆Wide 12V to 80V Operating Input Range
◆250mΩ Internal Power MOSFET
◆Up to 1MHz Programmable Switching Frequency
◆180μA Quiescent Current
◆Ceramic Capacitor Stable
◆Up to 95% Efficiency
◆Output Adjustable from 0.8V to 52V
◆Available in ESOP8 PbFree Package
◆High Voltage Power Conversion
◆Industrial Power Systems
◆Distributed Power Systems
◆Battery Powered Systems
Switch Node. This is the output from the high-side switch. A low VF Schottky rectifier to ground
is required. The rectifier must be close to the SW pins to reduce switching spikes.
Enable Input. Pulling this pin below the specified threshold or leaving it floating shuts the chip
down. Pulling it up above the specified threshold enables the chip.
Compensation. This node is the output of the GM error amplifier. Control loop frequency
compensation is applied to this pin.
Feedback. This is the input to the error amplifier. An external resistive divider connected between the output and GND is compared to the internal +0.8V reference to set the regulation voltage.
Ground. It should be connected as close as possible to the output capacitor avoiding the high current switch paths. Connect exposed pad to GND plane for optimal thermal performance.
Switching Frequency Program Input. Connect a resistor from this pin to ground to set the
Input Supply. This supplies power to all the internal control circuitry, both BS regulators and the high-side switch. A decoupling capacitor to ground must be placed close to this pin to minimize switching spikes.
Bootstrap. This is the positive power supply for the internal floating high-side MOSFET driver.
Connect a bypass capacitor between this pin and SW pin.
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Figure1 Function Block Diagram of EC1837
Typical Application Circuit
Figure2 Application Circuit, 5V Output
Absolute Maximum Ratings (at TA=25℃)
-0.3 to 80
-0.5V to VIN+0.5
BST to SW
-0.3 to +5
All other Pins
-0.3 to +5
ESD Susceptibility (Human Body Model)
Maximum Lead Soldering Temperature (10 Seconds)
Unless otherwise specified, these specifications apply over VIN=24V,VEN=2.5V,VCOMP=1.4V, TA=25°C
Specifications over temperature are guaranteed by design and characterization.
12V < VIN < 75V
Top Switch RDS(ON) (Note)
VBST – VSW = 5V
Top Switch Leakage
VEN = 0V, VSW = 0V
COMP to Current Sense
Error Amp Voltage Gain
Error Amp Transconductance
ICOMP = ±3μA
Error Amp Min Source current
VFB = 0.7V
Error Amp Min Sink current
VFB = 0.9V
VIN UVLO Threshold
VIN UVLO Hysteresis
0V < VFB < 0.8V
RFREQ = 150kΩ
Minimum Switch On Time
Shutdown Supply Current
VEN < 0.3V
Quiescent Supply Current
No load, VFB = 0.9V
Hysteresis = 20°C
Minimum Off Time
Minimum On Time
EN Up Threshold
EN Threshold Hysteresis
EN to Gnd resistance
The EC1837 is a programmable frequency, non-synchronous, step-down switching regulator with an integrated high-side high voltage power MOSFET. It provides a single highly efficient solution with current mode control for fast loop response and easy compensation. It features a wide input voltage range, internal soft-start control and precision current limiting. Its very low operational quiescent current makes it suitable for battery powered applications.
PWM Control Mode
At moderate to high output current, the EC1837 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off for at least 100ns before the next cycle starts. If, in one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET remains on, saving a turn-off operation.
Pulse Skipping Mode
Under light load condition the switching frequency stretches down zero to reduce the switching loss and driving loss.
The error amplifier compares the FB pin voltage with the internal reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge the external compensation network to form the COMP voltage, which is used to control the power MOSFET current.
During operation, the minimum COMP voltage is clamped to 0.9V and its maximum is clamped to 2.0V. COMP is internally pulled down to GND in shutdown mode. COMP should not be pulled up beyond 2.6V.
Most of the internal circuitries are powered from the 2.6V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 3.0V, the output of the regulator is in full regulation. When VIN is lower than 3.0V, the output decreases.
The EC1837 has a dedicated enable control pin(EN). With high enough input voltage, the chip can be enabled and disabled by EN which has positive logic. Its falling threshold is about 1.7V, and its rising threshold is about 1.9V.
When EN is pulled down below 1.7V, the chip is put into the lowest shutdown current mode. When EN is higher than zero but lower than its rising threshold, the chip is still in shutdown mode but the shutdown current increases slightly.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The UVLO rising threshold is about 7.2V while its falling threshold is a consistent 6.5V.
The soft-start is implemented to prevent the converter output voltage from overshooting during startup and short circuit recovery. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 2.6V. When it is lower than the internal reference(REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control.
Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than its upper threshold, it shuts down the whole chip. When the temperature is lower than its lower threshold, the chip is enabled again.
Floating Driver and Bootstrap Charging
The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 7.2V with a hysteresis of 150mV. The driver’s UVLO is soft-start related.
In case the bootstrap voltage hits its UVLO, the soft-start circuit is reset. To prevent noise, there is 20μs delay before the reset action. When bootstrap UVLO is gone, the reset is off and then soft-start process resumes.
The bootstrap capacitor is charged and regulated to about 5V by the dedicated internal bootstrap regulator. When the voltage between the BST and SW nodes is lower than its regulation, a PMOS pass transistor connected from VIN to BST is turned on. The charging current path is from VIN, BST and then to SW. External circuit should provide enough voltage headroom to facilitate the charging.
As long as VIN is sufficiently higher than SW, the bootstrap capacitor can be charged. When the power MOSFET is ON, VIN is about equal to SW so the bootstrap capacitor cannot be charged. When the external diode is on, the difference between VIN and SW is largest, thus making it the best period to charge. When there is no current in the inductor, SW equals the output voltage VOUT so the difference between VIN and VOUT can be used to charge the bootstrap capacitor.
At higher duty cycle operation condition, the time period available to the bootstrap charging is less so the bootstrap capacitor may not be sufficiently charged.
In case the internal circuit does not have sufficient voltage and the bootstrap capacitor is not charged, extra external circuitry can be used to ensure the bootstrap voltage is in the normal operational region. Refer to External Bootstrap Diode in Application section.
The DC quiescent current of the floating driver is about 20μA. Make sure the bleeding current at the SW node is higher than this value, such that:
Current Comparator and Current Limit
The power MOSFET current is accurately sensed via a current sense MOSFET. It is then fed to the high speed current comparator for the current mode control purpose. The current comparator takes this sensed current as one of its inputs. When the power MOSFET is turned on, the comparator is first blanked till the end of the turn on transition to avoid noise issues. The comparator then compares the power switch current with the COMP voltage.
When the sensed current is higher than the COMP voltage, the comparator output is low, turning off the power MOSFET. The cycle-by-cycle maximum current of the internal power MOSFET is internally limited.
Short Circuit Protection
When the output is shorted to the ground, the switching frequency is folded back and the current limit is reduced to lower the short circuit current. When the voltage of FB is at zero, the current limit is reduced to about 50% of its full current limit. When FB voltage is higher than 0.4V, current limit reaches 100%.
In short circuit FB voltage is low, the SS is pulled down by FB and SS is about 100mV above FB. In case the short circuit is removed, the output voltage will recover at the SS pace. When FB is high enough, the frequency and current limit return to normal values.
Startup and Shutdown
If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries.
While the internal supply rail is up, an internal timer holds the power MOSFET OFF for about 50μs to blank the startup glitches. When the internal soft-start block is enabled, it first holds its SS output low to ensure the remaining circuitries are ready and then slowly ramps up.
Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, power MOSFET is turned off first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down.
The EC1837 oscillating frequency is set by an external resistor, RFREQ from the FREQ pin to ground. The value of RFREQ can be calculated from:
Setting the Output Voltage
The output voltage is set using a resistive voltage divider from the output voltage to FB pin. The voltage divider divides the output voltage down to the feedback voltage by the ratio:
Thus the output voltage is:
For example, the value for R2 can be 10kΩ. With this value, R1 can be determined by:
For example, for a 3.3V output voltage, R2 is 10kΩ, and R1 is 31.6kΩ.
The inductor is required to supply constant current to the output load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will result in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current.
A good rule for determining the inductance to use is to allow the peak-to-peak ripple current in the inductor to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. The inductance value can be calculated by:
Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ΔIL is the peak-to-peak inductor ripple current.
Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated by:
Where ILOAD is the load current.
Table 1 lists a number of suitable inductors from various manufacturers. The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI requirement.
Output Rectifier Diode
The output rectifier diode supplies the current to the inductor when the high-side switch is off. To reduce losses due to the diode forward voltage and recovery times, use a Schottky diode.
Choose a diode whose maximum reverse voltage rating is greater than the maximum input voltage, and whose current rating is greater than the maximum load current. Table 2 lists example Schottky diodes and manufacturers.
The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors may also suffice. For simplification, choose the input capacitor with RMS current rating greater than half of the maximum load current.The input capacitor (C1) can be electrolytic, tantalum or ceramic.
When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors,
make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by:
The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by:
Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor.
In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by:
In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to:
The characteristics of the output capacitor also affect the stability of the regulation system. The EC1837 can be optimized for a wide range of capacitance and ESR values.
EC1837 employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the COMP pin. COMP pin is the output of the internal error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by:
Where AVEA is the error amplifier voltage gain, 400V/V; GCS is the current sense transconductance, 5.6A/V; RLOAD is the load resistor value.
The system has two poles of importance. One is due to the compensation capacitor (C3), the output resistor of error amplifier. The other is due to the output capacitor and the load resistor. These poles are located at:
Where, GEA is the error amplifier transconductance, 120μA/V.
The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at:
The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the output capacitor, is located at:
In this case, a third pole set by the compensation capacitor (C5) and the compensation resistor (R3) is used to compensate the effect of the ESR zero on the loop gain. This pole is located at:
The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause system unstable. A good rule of thumb is to set the crossover frequency to approximately one-tenth of the switching frequency.
To optimize the compensation components for conditions not listed in Table 3, the following procedure can be used.
1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation:
Where fC is the desired crossover frequency.